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TPC:义隆EM78P163,164N(18脚)

  • CPU Configuration
  • 1Kx13 bits on-chip ROM
  • 48x8 bits on-chip registers (SRAM, general purpose)
  • 5 level stacks for subroutine nesting 
  • Less than 1.5 Ma at 5V/IRC 4 MHz
  • Typically 15 Ua, at 3V/32kHz
  • Typically 1 Ua, during Sleep mode
  • 3 programmable Level Voltage Reset (LVR):4.0V, 3.3V 2.4V
  • Power-on Reset (POR): 1.8V
  • I/O Port Configuration
  • 2 bidirectional I/O ports : P5, P6
  • Wake-up port : P6
  • 7 programmable pull-down I/O pins
  • 7 programmable pull-high I/O pins 
  • 7 programmable open-drain I/O pins
  • External interrupt : P60
  • Operating Voltage Range:

Operating voltage: 2.0V~5.5V at 0°C ~70°C (commercial)

Operating voltage: 2.2V~5.5V at -40°C ~85°C (industrial)

  • Operating Frequency range (base on 2 clocks): 
  • Crystal Mode:

DC~20MHz/2clks @ 5V

DC~8MHz/2clks @ 3V

DC~4MHz/2clks @ 2.1V

  • ERC Mode:

DC~16 MHz/2clks @ 4.5V

DC~12 MHz/2clks @ 4V

DC~4MHz/2clks @ 2.1V

  • Internal RC Drift Rate: 

(Ta=25°C, VDD=5V ± 5%, VSS=0V)

Internal RC Frequency Drift Rate
Temperature (-40°C~85°C) Voltage (2.0V~5.5V) Process Total
455kHz ± 5% ± 5% ± 3% ± 13%
4 MHz ± 5% ± 5% ± 3% ± 13%
8 MHz ± 5% ± 5% ± 3% ± 13%
16 MHz ± 6% ± 5% ± 3% ± 14%
  • Peripheral Configuration
  • 8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and overflow interrupt
  • One comparator (typical offset voltage 10mV when input voltage range 0.5V~4.5V) with Cin+/internal Vref level select and Cin- 4 channel switch.
  • One Pulse Width Modulation (PWM ) with 10-bit resolution· High EFT immunity
  • Power down mode (Sleep mode)
  • Five available Interrupts:
  • TCC overflow interrupt
  • Input-port status changed interrupt (wake-up from sleep mode)
  • External interrupt 
  • PWM period match completion
  • Comparator output change interrupt
  • Other Features
  • Programmable prescaler of oscillator set-up time
  • One security register to prevent intrusion of user's OTP memory code
  • One configuration register to match user's requirements
  • Two clocks per instruction cycle
  • TBRD instruction
  • Package Type:
  • 14-pin DIP 300mil : EM78P163ND14J
  • 14-pin SOP 150mil : EM78P163NSO14J
  • 16-pin DIP 300mil : EM78P163ND16J
  • 16-pin SOP 150mil : EM78P163NSO16J